A series on what DAC 2026 actually told us about the state of EDA.
I said in my LinkedIn post from the floor that Microsoft's presence at DAC 2026 now rivals or exceeds the two companies that still define this industry, and that this would have been unthinkable to me in 1995. I promised more on that. Here it is - and it turns out my own history with Microsoft and this industry goes back a lot further than that post let on.
A desk in Redmond, sometime in the mid 90s. I was a field AE at Viewlogic, and I was visiting an engineer named John, who'd go on to spend years working on Xbox hardware but was, at that point, deep in one of Microsoft's early hardware efforts. On his desk sat two machines: an expensive SPARC workstation running Vantage, Viewlogic's flagship VHDL simulator, and an ordinary Windows PC running ModelSim. He kicked off the same compile-and-simulate run on both, at the same time. The PC won, by a wide margin. Then came the line I've never forgotten: "Simon, this ModelSim tool costs a tenth of Vantage, runs on my PC, and is ten times faster. Why should I keep using Vantage?" I didn't have an answer.
That afternoon in Redmond didn't settle anything industry-wide - it settled one engineer's opinion, on one desk. For most of the decade that followed, the prevailing wisdom across the rest of our industry held firm regardless: real EDA workloads belonged on Sun SPARC, HP, or SGI workstations, full stop, and PCs were for email and spreadsheets. It took Linux, arriving in force around 2000, to actually finish what that ModelSim demo had already shown me years earlier - that commodity x86 hardware, running the right operating system, at a fraction of the cost, was good enough for serious design work. Once that became true across the whole industry and not just true on one desk in Redmond, the workstation era was over.
At DAC in 2026, the balance being tested is different. It's not workstation versus PC - it's whether the entire EDA methodology holds up once you're the one actually building the silicon at hyperscale.
That's roughly where we are now. What's interesting isn't that Microsoft showing up this way happened - it's how it happened, because the mechanism isn't the one I expected, and it's a lot more durable than one demo on one desk.
Microsoft didn't earn a seat at this table by building an EDA tool. It earned one by needing EDA badly enough to comment about it, in public, in front of the entire industry. The talk that independent press flagged as the one worth circling twice this year wasn't from Synopsys, Cadence, or Siemens. It was Microsoft Corporate VP Artour Levin's SkyTalk on where EDA breaks down when you're building Maia-class AI accelerators at hyperscale -advanced nodes, extreme parallelism, and system-level data movement pushed past the point traditional flows were designed for. One reviewer called Levin's abstract essentially a requirements document from one of the world's most consequential silicon teams. That's not marketing copy. That's a customer's pain, published.
And it's not just the critique - Microsoft is also the room the critique gets settled in. This year Synopsys announced new autonomous agentic workflows, built with Microsoft and evaluated by AMD, running on Microsoft Discovery - the first EDA workflows available on that platform, including an implementation and closure flow pairing Synopsys's agents with Fusion Compiler on Azure. So in the same week, Microsoft is publicly telling EDA vendors their methodology doesn't hold up at the scale Microsoft actually operates at, and hosting the infrastructure those same vendors are using to ship their answer. Demanding customer and enabling platform, at the same conference, in the same breath.
That dual position is what makes this different from the visibility problem I wrote about last time, in another blog about DAC, where I talked about how a big booth backed by a thin customer list is a bet on a narrative. Microsoft's presence is backed by a tapeout schedule. Maia has to work. It has to hit power, performance, and yield targets on a timeline Microsoft doesn't control by press release - it controls by whether the chip actually comes back from the fab doing what it's supposed to do. When the stakes are that real, a public critique of your own tooling isn't a stunt. It's closer to an actual requirements document, aimed at an industry that has no choice but to read it.
Which is also, quietly, how you end up shaping the roadmap without selling a single license. Microsoft joined Siemens' pavilion panel this year alongside Arm, Broadcom, and NVIDIA, asking out loud whether AI-in-EDA is delivering the productivity it promises or just the appearance of it - a fair question from a company that is simultaneously being showcased by every vendor in the building as proof their AI works. When your pain points are specific enough and your platform is load-bearing enough, the workflows vendors choose to build and demo - debug closure, root-cause analysis, implementation QoR — start looking a lot like your ticket queue. Nobody had to lobby for that. It just happens when you're both the harshest customer and the host.
So "unthinkable in 1995" isn't really about Microsoft showing up at a chip conference. I'd have found that a lot more thinkable than most, having sat at that desk in Redmond and watched the tools I was selling lose the argument in real time. It's about what had to be true for Microsoft's version of it to actually work this time: the line between who designs chips and who builds the tools to design chips has gotten porous enough that a hyperscaler's frustration is now industry-shaping in its own right, without Microsoft ever needing to become an EDA company to do it. Being a customer in enough pain, loud enough about it, in the right room, turns out to be its own kind of thought leadership - a very different kind from the one I wrote about in my last post, but no less real for being unglamorous.
John, back in Redmond, wasn't trying to make a point about the future of EDA vendors - he just wanted his simulation to finish before lunch, and the numbers on his own desk did the talking. Artour Levin's SkyTalk was a great deal more polished than that, and Microsoft's bet this time has actual cloud infrastructure under it, not just one fast demo on one desk. But the underlying logic hasn't moved an inch in thirty years: the real requirements document for this industry has always been written by whoever is actually trying to ship something, not by whoever has the biggest booth.
I've got at least one more of these in me before I'm done processing this year's DAC - including what I still think DAC hasn't answered yet: what "end-to-end" actually means in a modern chip design flow, and why the pieces still don't talk to each other the way my last few years at Intel, trying to link manufacturing quality back into design, taught me they need to. More on that soon. In the meantime, John Simmons and I and the rest of the team here at AiT have a year to get our own narrative sharp before DAC 2027 in San Jose, where DAC belongs. If Microsoft's Wednesday morning slot is any indication of where the industry's attention actually goes, we've got a good template for how to earn it.
Simon Bennett is Co-Founder and Principal Solutions Consultant at AiT.