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WATCHTOWER BRIEF · EDA 3.0 · AI-NATIVE DESIGN A VIEW FROM THE WATCHTOWER · OCTOBER 2026 Three extraordinary months: a retreat from fab software, long-horizon design agents, a frontier model being built to drive EDA tools, a royalty deal with a hyperscaler and a push toward AI-defined fabs. Is this the end of EDA as we know it?
Something remarkable is happening in electronic design automation. In just over three months we have seen a sequence of announcements that, taken one at a time, look like the natural evolution of semiconductor engineering. Taken together, they suggest something far more profound. The industry is starting to question not only how we design chips, but what the design process itself should look like, and whether the EDA industry we spent decades building is approaching the end of an era. I don't believe we're witnessing the end of EDA. I believe we're witnessing the end of EDA as we've known it. The distinction matters. What happened in EDA between July and October 2026?Let's rewind to July. On July 7, Reuters reported, citing six people briefed on the matter, that Synopsys was walking away from part of its fab manufacturing-control software. The products named by sources were its Equipment Engineering System (EES) and Fault Detection and Classification (FDC) tools, which came to Synopsys through its 2021 purchase of BISTel's manufacturing solutions business. More than ten chipmakers had reportedly received end-of-life notices. The stated rationale was to redirect engineering resources toward AI-driven design (The Next Web has a good summary). Synopsys described the products as older diagnostic tools outside customers' critical production paths, and said it would continue investing in manufacturing analytics. An interesting strategic decision. Hardly an existential moment for EDA. What followed makes it look rather more significant.
Quite a quarter. These announcements are not identical in scope or maturity. Some describe deployed capabilities, others roadmaps, partnerships or vendor-reported benchmarks. But their collective direction is hard to ignore.
How did EDA organize the semiconductor industry?For most of its history, EDA has advanced by solving harder engineering problems with more sophisticated specialized tools: logic synthesis, simulation, formal verification, static timing analysis, place and route, physical verification, signoff. Each advance let engineers manage another level of complexity. What an achievement that has been. Without EDA, modern semiconductor design would be impossible. We could not build the processors, accelerators and networking devices that underpin the digital economy. But one structural characteristic deserves a closer look. We organized the industry around the tools required to perform engineering tasks, not around the engineering decisions those tasks were meant to support. Requirements were captured in one place. Architects made trade-offs somewhere else. RTL was written, verified, synthesized, placed, routed and signed off across a succession of environments. Manufacturing data lived in another world altogether. And when something went wrong, engineers investigated, correlated evidence, revisited assumptions and worked their way back through the process by hand. We became exceptionally good at automating individual engineering activities. We have been far less successful at automating the connections between them. That distinction becomes critical when AI enters the picture. What changes when EDA tools start thinking?Consider GPT-Synopsys and AgentEngineer. Traditional EDA software executes operations an engineer defines. AI-enabled systems can increasingly help decide which operations to run, in what sequence, and how to respond to the results. Synopsys describes engineers delegating objectives such as PPA optimization and timing or verification closure, with agents running tools, interpreting results and iterating toward verified outcomes for engineer review. That changes the relationship between the engineer and the software. Instead of asking, “Which tool should I run next?”, we begin asking, “What engineering outcome am I trying to achieve?” It sounds like a subtle distinction. It isn't. Once software orchestrates engineering work, the value shifts from the individual command to the intelligence directing the workflow. The implications for licensing, product boundaries and customer relationships could be enormous. If an agent can complete a complex task across multiple tools, does the customer still think in terms of individual tool licenses? Or does the customer start buying outcomes, compute capacity, autonomous workflows and measurable productivity? This is no longer hypothetical. GPT-Synopsys is planned as a joint offering that bundles compute, model and licenses under a shared revenue framework. The Amazon agreement moves Synopsys IP toward license-plus-royalty economics tied to production volume. We don't yet know how fast commercial models will change, but the first examples are already on the table. We looked at the forces behind EDA spending in The Economics of EDA: Who Actually Owns the Forecast?. What does Synopsys leaving fab software tell us?Now return to that July announcement. Why step back from manufacturing software just as AI promises to transform manufacturing? The answer lies in separating two very different businesses. One is the operational software that monitors equipment, detects faults and supports the daily running of a fab. The other is predictive engineering intelligence: simulation, process modeling, optimization, and understanding how manufacturing physics shapes design outcomes. Synopsys appears to be shifting investment toward the second while reducing its commitment to some legacy products in the first. The NVIDIA announcement in October reinforces that distinction. Accelerated physics-based simulation makes it practical to explore far more possibilities, and to evaluate materials, devices, processes and packaging decisions faster. But the manufacturing story carries another lesson: data sovereignty matters. According to Reuters' sources, improving the EES product required chipmakers to share tightly held manufacturing data, and some customers, Samsung among them, were already building in-house alternatives. Process knowledge, recipes, equipment behavior and yield data are among a manufacturer's most valuable competitive assets. AI-enabled semiconductor engineering cannot assume that every company will hand its proprietary information to one enormous centralized platform. We may instead need distributed intelligence: systems that exchange engineering knowledge and evidence without requiring unrestricted access to the underlying data. That has profound implications for how the next generation of engineering platforms should be designed. Why aren't faster EDA tools enough?Imagine AI cuts the time for a verification or implementation task by an order of magnitude. Wonderful. But what if the underlying requirement was wrong? What if the architectural assumption was flawed? What if the implementation meets timing and power targets but fails to deliver the intended system behavior? What if manufacturing exposes a systematic weakness that nobody feeds back into the original design decisions? Then we have accelerated the wrong answer. Faster tools don't automatically produce better engineering. This is where I believe the next great opportunity lies. The industry needs to connect the whole engineering decision process, from initial intent through architecture, implementation, verification, manufacturing and field performance, and to preserve the reasoning, assumptions, constraints and evidence that link those stages. Not just the files. Not just the reports. The engineering provenance. Why was a decision made? Which requirements drove it? Which alternatives were considered? What evidence supported it? What changed when new information arrived? If AI is going to make engineering decisions, those questions become more important, not less. What does that look like from the lab bench? In part two, The Problem Behind the Validation Problem, I looked at what verification and validation engineers say about working between the silos, and what they say gets in the way. What is EDA 3.0?I have been advocating a concept I call EDA 3.0. Not because the industry needs another round of branding, and certainly not because existing EDA is obsolete. Quite the opposite. The tools built by Synopsys, Cadence, Siemens and the wider ecosystem remain essential, and their accumulated algorithms, verification capability and manufacturing expertise are extraordinarily valuable. EDA 3.0 is about connecting and amplifying that investment.
In that world, requirements are no longer documents handed to designers; they become machine-actionable engineering intent. Architecture stops being a one-time activity before implementation and becomes a continuously evaluated set of system-level trade-offs. Verification is no longer just a gate at the end of a stage; it becomes an ongoing source of evidence. Manufacturing and test stop being downstream destinations and become sources of intelligence for the next engineering decision. And AI is not a chatbot bolted onto an EDA application. It becomes part of the connective tissue of the engineering process. Who should own the intelligence layer in chip design?Here is where things get interesting. Synopsys clearly sees the opportunity; its investments in autonomous agents, specialized models, advanced packaging and multiphysics show the established industry is not standing still. Nor should anyone underestimate Cadence and Siemens, both of which are building agentic systems of their own, or the new generation of engineering software companies. But a fundamental question remains: should the company supplying the design tools also own the intelligence that orchestrates the entire engineering lifecycle? There are real arguments in favor. Deep integration can deliver large performance advantages, and native access to tool internals, design databases and proprietary algorithms can make automation more powerful and reliable. But semiconductor companies rarely live in a single-vendor universe. They use multiple EDA suppliers, proprietary internal tools, specialized IP, third-party verification technology, manufacturing partners and systems engineering platforms, and they increasingly work across organizational boundaries with real security, IP and regulatory constraints. An intelligent engineering platform has to operate in that reality. That points to an opportunity for open, interoperable engineering intelligence that sits across tool boundaries: not replacing the established ecosystem, but making it work together. The competitive battleground may turn out to be less about who owns the best individual tool and more about who controls the relationship between engineering intent, execution and evidence. How could AI change the economics of chip design?There is another reason this matters. Advanced process nodes, complex architectures, sophisticated packaging and demanding verification are pushing design costs up. At the same time, AI is creating demand for more specialized silicon. Hyperscalers want custom accelerators; the Amazon agreement exists precisely because of that. Automotive needs ever more capable compute platforms. Industrial systems, robotics and edge AI are opening new markets for application-specific designs. The potential market for custom silicon is expanding, but the economics of developing it remain a formidable barrier. AI offers a way to change the equation, not simply by making existing tools run faster, but by reducing the engineering effort wasted on poorly informed decisions, repeated analysis, unnecessary iteration and preventable mistakes. The distinction matters. A 30x speedup in a simulation workload, the kind of figure in NVIDIA's October announcement, does not mean a 30x reduction in design cost. A 40% reduction in a debug workflow does not mean a 40% reduction in time to market. The real economic prize is reducing the total effort required to move from an engineering requirement to a successful manufactured product. That is a systems problem, and systems problems demand systems thinking. We explored the buyer's side of that calculation in How EDA ROI Shapes Semiconductor Tool Decisions. Where will the next battle in EDA be fought?For decades, the boundaries between semiconductor engineering disciplines have been both necessary and limiting. Specialization created extraordinary technical depth. It also created fragmentation. Requirements engineering built its own systems. Architecture teams built their own models. EDA vendors optimized their own workflows. Manufacturing and yield organizations built their own data infrastructure. Each discipline grew more sophisticated; the connections between them often stayed stubbornly manual. AI now threatens to expose those boundaries as one of the largest remaining sources of inefficiency.
That is why I believe the next wave of semiconductor innovation won't come only from the traditional EDA giants. It will also come from companies specializing in requirements intelligence, architectural exploration, virtual platforms, advanced packaging, verification evidence, manufacturing analytics and yield feedback. Individually, those technologies solve important problems. Connected intelligently, they can transform the engineering process, and that creates room for an ecosystem rather than a monopoly. So, is this the end of EDA?Yes. And no. It is not the end of synthesis, simulation, verification, physical design or signoff. Those disciplines aren't going away; as complexity rises, their underlying technology matters more. Nor is it necessarily the end of the established vendors, whose expertise and installed base give them substantial advantages in the AI era. But I do think we are approaching the end of an industry model built mainly around selling increasingly sophisticated, largely separate tools to engineers who must connect the results by hand. The future looks different. Engineering intent becomes explicit. AI agents execute increasingly complex workflows. Tools become services within a broader intelligent environment. Evidence and provenance travel with engineering decisions. Manufacturing outcomes inform upstream design. And a platform is measured less by how many tools it contains than by how effectively it helps engineers produce successful silicon. The past three months are strong evidence that this transition is accelerating. The incumbents have recognized it. The hyperscalers have recognized it. The AI companies have recognized it. And a new generation of engineering technology companies is positioning to take part. The question isn't whether EDA will survive. Of course it will. The question is what EDA becomes when the intelligence moves beyond the tools. For an industry that has spent more than half a century automating electronic design, that may be the most important question it has faced. The end of EDA? Perhaps. The beginning of something much bigger? Almost certainly. Frequently asked questionsIs AI going to replace EDA tools?No. Synthesis, simulation, verification, physical design and signoff remain essential, and AI agents such as Synopsys AgentEngineer and GPT-Synopsys are designed to operate those tools rather than replace them. What is changing is who, or what, orchestrates the workflow and how the results are connected. What is GPT-Synopsys?GPT-Synopsys is a specialized model announced by Synopsys and OpenAI on September 30, 2026, designed to reason about chip design and verification and to operate Synopsys EDA tools directly. It is planned as a joint offering that bundles compute, model and licenses, with integration into the Synopsys Autopilot agentic AI platform. What are Synopsys AgentEngineer and Autopilot?Announced on September 28, 2026, AgentEngineer is a portfolio of long-horizon AI agents that plan and execute complete engineering workflows across verification, implementation, analog, manufacturing and simulation. They run on the Synopsys Autopilot Platform, with general availability planned for the end of 2026. Why did Synopsys exit parts of its fab software business?According to Reuters, Synopsys ended development of its Equipment Engineering System and Fault Detection and Classification products to redirect engineers toward AI-driven design. Synopsys described them as older diagnostic tools outside customers' critical production paths and said it would keep investing in manufacturing analytics. What is EDA 3.0?EDA 3.0 is the shift from tool-centric, siloed electronic design automation to an AI-native engineering lifecycle that connects intent and requirements through architecture, implementation, verification, manufacturing and yield, with engineering provenance carried alongside every decision. What is engineering provenance in chip design?Engineering provenance is the record of why a design decision was made: the requirements that drove it, the alternatives considered, the evidence that supported it and what changed as new information arrived. It becomes essential when AI agents make or recommend engineering decisions. If you are working through what agentic EDA means for your own design flow, I would be glad to compare notes. Reach me directly at simon@ai-techsales.com. Simon Bennett is CSO and Co-Founder, AiT, and founder of Kite SOC LLC. He has more than 40 years of experience in EDA and semiconductor IP, at both EDA companies and semiconductor design companies. FURTHER READING ON THE WATCHTOWER BRIEF Sources: Reuters, Jul 7; The Next Web, Jul 7; Synopsys, Jul 27; Synopsys/TSMC, Sep 23; Synopsys, Sep 28; Synopsys and OpenAI, Sep 30; Synopsys and Amazon, Sep 30; NVIDIA, Oct 14. Performance figures are as reported by the vendors. | |||||||||||||||||||||||||||